NXP Semiconductors /LPC11Cxx /UART /IIR

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Interpret as IIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PENDING)INTSTATUS 0 (4_MODEM_INTERRUP)INTID0RESERVED 0FIFOENABLE 0 (ABEOINT)ABEOINT 0 (ABTOINT)ABTOINT 0RESERVED

INTSTATUS=PENDING, INTID=4_MODEM_INTERRUP

Description

Interrupt ID Register. Identifies which interrupt(s) are pending.

Fields

INTSTATUS

Interrupt status. Note that IIR[0] is active low. The pending interrupt can be determined by evaluating IIR[3:1].

0 (PENDING): At least one interrupt is pending.

1 (NO_INTERRUPT_IS_PEND): No interrupt is pending.

INTID

Interrupt identification. IER[3:1] identifies an interrupt corresponding to the UART Rx FIFO. All other combinations of IER[3:1] not listed below are reserved (100,101,111).

0 (4_MODEM_INTERRUP): 4 - Modem interrupt.

1 (3_THRE_INTERRUPT): 3 - THRE Interrupt.

2 (2A__RECEIVE_DATA_AV): 2a - Receive Data Available (RDA).

3 (1_RECEIVE_LINE_S): 1 - Receive Line Status (RLS).

6 (2B__CHARACTER_TIME_): 2b - Character Time-out Indicator (CTI).

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

FIFOENABLE

These bits are equivalent to FCR[0].

ABEOINT

End of auto-baud interrupt. True if auto-baud has finished successfully and interrupt is enabled.

ABTOINT

Auto-baud time-out interrupt. True if auto-baud has timed out and interrupt is enabled.

RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

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